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/ Developer Source 18 / Developer Source Volume 18 (I-MODE Publications, Inc.)(2000).iso / sdevl / 941 / amblf103.gif

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Graphics Interchange Format  |  1999-09-30  |  41KB  |  653x372  |  4-bit (16 colors)

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OCR: Figure 3. The Rational Unified Process (RUP) Life Cycle =<< trace>> > << trace>> Requirements <<< traces .; Design Implementation Model Model => << fratt>> Test Model iter # Rer. #1 iter. #1 iter. # << traces; << trace>> << trace>> << trace>> << trace>> Zadscietrace>> << trace> > Requirements Design Implemer tation Model << trace>> Model " << trace> > Moda Test Model Mer. #2 itar. #2 ter. #2 iter. #2 << trace>> trace> > << trace>> << trace>> << trace> > Requirements Model Model << trace>> . Imple nentation Model << trace>> Test Model Her: #3 Her. #3 iter. #3 iter. #3 << trace>> < < race>> << trace>? << trace> > Requirements Design Implementation Hodel << trace>> Model Model fest Modet iter.# iter. #n iter. #n iter. in

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